id4_common.devices.softgluezynq_parts#
SoftGlueZynq
Module Contents#
- id4_common.devices.softgluezynq_parts.logger#
- class id4_common.devices.softgluezynq_parts.SoftGlueSignal#
Bases:
ophyd.DeviceSoftGlue I/O signal device with signal and BI (binary-input) components.
- signal#
- bi#
- class id4_common.devices.softgluezynq_parts.SGZDevideByN#
Bases:
ophyd.DeviceSoftGlue divide-by-N frequency divider block.
- enable#
- clock#
- reset#
- out#
- n#
- class id4_common.devices.softgluezynq_parts.SGZUpCounter#
Bases:
ophyd.DeviceSoftGlue up-counter block that accumulates clock pulses while enabled.
- enable#
- clock#
- reset#
- counts#
- class id4_common.devices.softgluezynq_parts.SGZDownCounter#
Bases:
ophyd.DeviceSoftGlue down-counter block that counts down from a preset value.
- enable#
- clock#
- load#
- preset#
- out#
- class id4_common.devices.softgluezynq_parts.SGZGateDly#
Bases:
ophyd.DeviceSoftGlue gate-and-delay block that produces a programmable-width output pulse.
- input#
- clock#
- delay#
- width#
- out#
- class id4_common.devices.softgluezynq_parts.SGZClocks#
Bases:
ophyd.DeviceSoftGlue clock source block exposing 10/20/50 MHz and a variable-rate clock.
- clock_10MHz#
- clock_20MHz#
- clock_50MHz#
- clock_variable#
- class id4_common.devices.softgluezynq_parts.SGZGates#
Bases:
ophyd.DeviceSoftGlue two-input gate (AND/OR) block.
- in1#
- in2#
- out#
- class id4_common.devices.softgluezynq_parts.SGZDFF#
Bases:
ophyd.DeviceSoftGlue D flip-flop block with set, data, clock, clear, and output signals.
- set_#
- d#
- clock#
- clear#
- out#
- class id4_common.devices.softgluezynq_parts.SGZHistScal#
Bases:
ophyd.DeviceSoftGlue histogram scaler block for time-resolved counting into histogram bins.
- en#
- sync#
- det#
- det2#
- mode#
- clock#
- read_#
- clear#
- class id4_common.devices.softgluezynq_parts.SGZhistScalerDma#
Bases:
ophyd.DeviceSoftGlue DMA readout block for the histogram scaler data.
- enable#
- scan#
- read_button#
- clear_button#
- debug#
- hist#