id4_common.devices.softgluezynq_old#

SoftGlueZynq

Module Contents#

id4_common.devices.softgluezynq_old.logger#
class id4_common.devices.softgluezynq_old.SoftGlueSignal#

Bases: ophyd.Device

SoftGlue I/O signal device with signal and BI (binary-input) components.

signal#
bi#
class id4_common.devices.softgluezynq_old.SoftGlueZynqDevideByN#

Bases: ophyd.Device

SoftGlue divide-by-N frequency divider block.

enable#
clock#
reset#
out#
n#
class id4_common.devices.softgluezynq_old.SoftGlueZynqUpCounter#

Bases: ophyd.Device

SoftGlue up-counter block that accumulates clock pulses while enabled.

enable#
clock#
reset#
counts#
class id4_common.devices.softgluezynq_old.SoftGlueZynqGateDly#

Bases: ophyd.Device

SoftGlue gate-and-delay block that produces a programmable-width output pulse.

input#
clock#
delay#
width#
out#
class id4_common.devices.softgluezynq_old.SoftGlueScalToStream#

Bases: ophyd.Device

SoftGlue scaler-to-DMA-stream block that serialises counter data for readout.

reset#
chadv#
imtrig#
flush#
full#
advdone#
imdone#
fifo#
dmawords#
class id4_common.devices.softgluezynq_old.SoftGlueClocks#

Bases: ophyd.Device

SoftGlue clock source block exposing 10/20/50 MHz and a variable-rate clock.

clock_10MHz#
clock_20MHz#
clock_50MHz#
clock_variable#
class id4_common.devices.softgluezynq_old.SoftGlueZynqDevice(*args, reset_sleep_time=0.2, reference_clock=10000000.0, **kwargs)#

Bases: ophyd.Device

SoftGlue Zynq FPGA timing device (legacy version) with full default_settings setup.

dma#
buffers#
io#
up_counter_count#
up_counter_trigger#
up_counter_gate_on#
up_counter_gate_off#
div_by_n_count#
div_by_n_trigger#
div_by_n_interrupt#
gate_trigger#
scaltostream#
clocks#
clock_freq#
start_softglue()#

Bluesky plan stub to assert the global enable buffer (in1 = ‘1’).

stop_softglue()#

Bluesky plan stub to de-assert the global enable buffer (in1 = ‘0’).

start_detectors()#

Bluesky plan stub to assert the detector enable buffer (in2 = ‘1’).

stop_detectors()#

Bluesky plan stub to de-assert the detector enable buffer (in2 = ‘0’).

reset_plan()#

Bluesky plan stub to pulse the counter-reset and DMA-reset buffers.

clear_enable_dma()#

Bluesky plan stub to clear the DMA buffer and then enable DMA acquisition.

clear_disable_dma()#

Bluesky plan stub to clear the DMA buffer and then disable DMA acquisition.

setup_trigger_plan(period_time, pulse_width_time, pulse_delay_time=0)#

Bluesky plan stub to configure the trigger period, pulse width, and delay in clock ticks.

setup_count_plan(time)#

Bluesky plan stub to set the count divider N for the given count time in seconds.

default_settings(timeout=10)#

Configure clocks, buffers, counters, I/O, DMA, and trigger for flyscan operation.